In paging the physical address space of a process is non-contiguous. Paging is implemented using frames and pages.
To execute a process, its pages are loaded into any available memory frames from the backing store. A Page Table is used to translate logical address to physical address
Address generated by CPU is divided into:
Page number (p) – used as an index into a page table which contains base address of each page in physical memory
Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit
If address space size = 2m
Page size = 2n
Page number = higher order (m-n) bits
Page offset = n low-order bits
Q. Using a page size of 4bytes and physical memory of 32 bytes, find the physical address if the logical address is
a) Page size = 4bytes = 22 (i.e. n=2)
Address space = 32 = 25 (i.e. m=5)
Logical address = 4
In binary = 00100
Page number=(higher)(m-n)bits=5-2=3 bits
i.e. 001 = 1
Offset = (lower)n bits = 2 bits i.e. 00 = 0
From page table, if page number = 1
Then frame = 6
Physical address = frame * page size+offset = 6*4+0 = 24
b) Discuss your answer in the comments section
Q. If it takes 20 nanoseconds to search the TLB and 100 nanoseconds to access memory, then find the effective access time if the hit-ratio is 80%.
Time taken to access data if page entry is in TLB = 20+100=120
Time taken to access data if page entry is not in TLB = 20+100+100 = 220
Hence, Effective access time = .80120 + .20220
= 140 nanoseconds
Q. If it takes 20 nanoseconds to search the TLB and 100 nanoseconds to access memory, then find the effective access time if the miss-ratio is 2%.
Effective access time = .98120 + .02220
= 122 nanoseconds
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