Practice question on memory management

Q1. A CPU generates 32-bit virtual address. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of TLB is (Gate 2006)

a)11 bits

b) 13 bits

c) 15 bits

d) 20 bits

Q2. Consider a paging hardware with TLB. Assume that the entire page table and all the pages are in physical memory. It takes 10 ms to search the TLB and 80 ms to access the physical memory. If the TLB hit ratio is 0.6, the effective memory access time (in ms) is ____________. (Gate 2014)

Q3. Recall that Belady’s anomaly is that the pages-fault rate may increase as the number of allocated frames increases. Now consider the following statements:

S1: Random page replacement algorithm (where a page chosen at random is replaced) suffers from Belady’s anomaly. (Gate 2017)

S2: LRU page replacement algorithm suffers Which of the following is CORRECT?

(a) S1 is true, S2 is true (b) S1 is true, S2 is false (c) S1 is false , S2 is true (d) S1 is false, S2 is false  

Q4. Consider a machine with 64 MB physical memory and a 32-bit virtual address space. If the page size is 4KB, what is the approximate size of the page table? (GATE 2001)
(a) 16 MB
(b) 8 MB
(c) 2 MB
(d) 24 MB

Q5. Consider the following heap (figure) in which blank regions are not in use and hatched region are in use. The sequence of requests for blocks of size 300, 25, 125, 50 can be satisfied if we use